Here is a block diagram representing how the USB packets will be handled in the USRP.
The first block (USB block) will be in charge of the separation of packet per
tx_usb_fifo: 16 bits in, 32 bits out.
tx_chan_fifo_X: 32 bits in and out.
tx_cmd_fifo: 32 bits in and out.
The data bus between usb_block and data_block is 32 bits wide. I am wondering if this is not too much.
All the arrows that loop on the same state and have no action are not shown.
This process fills in the tx_usb_fifo while removing the padding from the
This process forward each packet stored into tx_usb_fifo to a channel
specific fifo (tx_chan_fifo_X or tx_cmd_fifo):
There is one variable that is shared between the two processes: #packet_in_usb_fifo.
This process sends the samples to the Tx_chain at the time specified in the
This process executes the sub-commands stored in tx_cmd_fifo. This is the
only process in command block.